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Switch-Level Timing Simulation of MOS VLSI Circuits - The Springer International Series in Engineering and Computer Science Vasant B. Rao Softcover reprint of the original 1st ed. 1989 edition
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Switch-Level Timing Simulation of MOS VLSI Circuits - The Springer International Series in Engineering and Computer Science
Vasant B. Rao
Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Today a wide range of tools exist for analYSiS, deSign, and verification, and expert systems and synthesis tools are rapidly emerging.
210 pages, biography
| Mediji | Grāmatas Paperback Book (Grāmata ar mīksto vāku un līmēto muguru) |
| Izlaists | 2011. gada 5. oktobris |
| ISBN13 | 9781461289630 |
| Izdevēji | Springer-Verlag New York Inc. |
| Lapas | 210 |
| Izmēri | 155 × 235 × 12 mm · 317 g |
| Valoda | Angļu |
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