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SystemVerilog for Verification: A Guide to Learning the Testbench Language Features Chris Spear Softcover reprint of the original 2nd ed. 2008 edition
SystemVerilog for Verification: A Guide to Learning the Testbench Language Features
Chris Spear
The updated second edition of this book provides practical information for hardware and software engineers using the SystemVerilog language to verify electronic designs.
429 pages, black & white illustrations
| Mediji | Grāmatas Paperback Book (Grāmata ar mīksto vāku un līmēto muguru) |
| Izlaists | 2010. gada 5. novembris |
| ISBN13 | 9781441945617 |
| Izdevēji | Springer-Verlag New York Inc. |
| Lapas | 429 |
| Izmēri | 155 × 235 × 23 mm · 648 g |
| Valoda | Angļu |