Pastāsti draugiem par šo preci:
High Level Synthesis of ASICs under Timing and Synchronization Constraints - The Springer International Series in Engineering and Computer Science David C. Ku 1992 edition
High Level Synthesis of ASICs under Timing and Synchronization Constraints - The Springer International Series in Engineering and Computer Science
David C. Ku
Computer-aided synthesis of digital circuits from behavioral level specifications offers an effective means to deal with increasing complexity of digital hardware design.
294 pages, biography
Ziemassvētku dāvanas var atgriezt līdz 31. janvārim