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SVA: The Power of Assertions in SystemVerilog Eduard Cerny Softcover reprint of the original 2nd ed. 2015 edition
SVA: The Power of Assertions in SystemVerilog
Eduard Cerny
This book is a comprehensive guide to assertion-based verification of hardware designs using System Verilog Assertions (SVA). The book makes SVA usable and accessible for hardware designers, verification engineers, formal verification specialists and EDA tool developers.
609 pages, 173 black & white illustrations, 25 black & white tables, biography
| Mediji | Grāmatas Paperback Book (Grāmata ar mīksto vāku un līmēto muguru) |
| Izlaists | 2016. gada 23. augusts |
| ISBN13 | 9783319331096 |
| Izdevēji | Springer International Publishing AG |
| Lapas | 590 |
| Izmēri | 155 × 235 × 31 mm · 843 g |
| Valoda | Vācu |
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