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Digital System Verification: A Combined Formal Methods and Simulation Framework - Synthesis Lectures on Digital Circuits & Systems Lun Li
Digital System Verification: A Combined Formal Methods and Simulation Framework - Synthesis Lectures on Digital Circuits & Systems
Lun Li
This book focuses on an Integrated Design Validation (IDV) system that provides a framework for design validation and takes advantage of current technology in the areas of simulation and formal verification resulting in a practical validation engine with reasonable runtime.
| Mediji | Grāmatas Paperback Book (Grāmata ar mīksto vāku un līmēto muguru) |
| Izlaists | 2010. gada 18. februāris |
| ISBN13 | 9783031798146 |
| Izdevēji | Springer International Publishing AG |
| Lapas | 79 |
| Izmēri | 150 × 220 × 10 mm · 197 g |
| Valoda | Angļu |