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Chip Multiprocessor Architecture: Techniques to Improve Throughput and Latency - Synthesis Lectures on Computer Architecture Kunle Olukotun
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Chip Multiprocessor Architecture: Techniques to Improve Throughput and Latency - Synthesis Lectures on Computer Architecture
Kunle Olukotun
The exact size of a CMP's cores can vary from very simple pipelines to moderately complex superscalar processors, but once a core has been selected the CMP's performance can easily scale across silicon process generations simply by stamping down more copies of the hard-to-design, high-speed processor core in each successive chip generation.
145 pages, VIII, 145 p.
| Mediji | Grāmatas Paperback Book (Grāmata ar mīksto vāku un līmēto muguru) |
| Izlaists | 2007. gada 31. decembris |
| ISBN13 | 9783031005923 |
| Izdevēji | Springer International Publishing AG |
| Lapas | 145 |
| Izmēri | 190 × 235 × 12 mm · 302 g |
| Valoda | Angļu |