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Computer Architecture Techniques for Power-Efficiency - Synthesis Lectures on Computer Architecture Stefanos Kaxiras
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Computer Architecture Techniques for Power-Efficiency - Synthesis Lectures on Computer Architecture
Stefanos Kaxiras
Documents some of the most important architectural techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in processors and memory hierarchies. A significant number of techniques have been proposed for a wide range of situations and this book synthesizes those techniques by focusing on their common characteristics.
220 pages, black & white illustrations
| Mediji | Grāmatas Paperback Book (Grāmata ar mīksto vāku un līmēto muguru) |
| Izlaists | 2008. gada 1. maijs |
| ISBN13 | 9781598292084 |
| Izdevēji | Morgan & Claypool Publishers |
| Lapas | 207 |
| Izmēri | 236 × 192 × 12 mm · 385 g |
| Valoda | Angļu |