Pastāsti draugiem par šo preci:
Yield Simulation for Integrated Circuits - The Springer International Series in Engineering and Computer Science D.M. Walker 1987 edition
Yield Simulation for Integrated Circuits - The Springer International Series in Engineering and Computer Science
D.M. Walker
Since only half the chip area would have redundancy, I was concerned that the increase in yield would not outweigh the increased costs of testing and redundancy programming. I wanted a simulator that would allow me to evaluate the yield of arbitrary redundant layouts, hence I termed such a simulator a layout or yield simulator.
209 pages, biography
| Mediji | Grāmatas Hardcover Book (Grāmata ar cieto muguriņu un vāku) |
| Izlaists | 1987. gada 30. septembris |
| ISBN13 | 9780898382440 |
| Izdevēji | Kluwer Academic Publishers |
| Lapas | 209 |
| Izmēri | 156 × 234 × 14 mm · 512 g |
| Valoda | Angļu |