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Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL Ferdjallah, Mohammed (Old Dominion University, USA)
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Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL
Ferdjallah, Mohammed (Old Dominion University, USA)
Digital systems design requires a rigorous modeling and simulation analysis that eliminates design risks and potential harm to users. Introduction to Digital Systems Modeling and Simulation allows readers to model and simulate digital principles using Very High Speed Integrated Circuit Hardware Description Language (VHDL) programming.
232 pages, Illustrations
| Mediji | Grāmatas Hardcover Book (Grāmata ar cieto muguriņu un vāku) |
| Izlaists | 2011. gada 5. jūlijs |
| ISBN13 | 9780470900550 |
| Izdevēji | John Wiley & Sons Inc |
| Lapas | 240 |
| Izmēri | 163 × 236 × 17 mm · 453 g |
