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VHDL for Logic Synthesis Andrew Rushton 3. izdevums
VHDL for Logic Synthesis
Andrew Rushton
Making VHDL a simple and easy-to-use hardware description language Many engineers encountering VHDL (very high speed integrated circuits hardware description language) for the first time can feel overwhelmed by it.
484 pages, Illustrations
| Mediji | Grāmatas Hardcover Book (Grāmata ar cieto muguriņu un vāku) |
| Izlaists | 2011. gada 18. aprīlis |
| ISBN13 | 9780470688472 |
| Izdevēji | John Wiley & Sons Inc |
| Lapas | 496 |
| Izmēri | 251 × 175 × 29 mm · 952 g |
| Valoda | Angļu |